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Zero instruction set computer (ZISC)

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As the name suggest, this category of computing devices does not have any instruction set. At a first glance, this may seem impossible and you may think over how a minimum of two distinct symbols are needed to represent an information (in connection to binary numbers).

This might seem to be revolutionary and it is easy to understand at the same time. It is based on some simple principles which we will take a look at.

Zero instruction set computer (ZISC) is a computer architecture based on two fundamental ideas:

  • Pattern matching
  • Absence of micro instructions

It has been jointly developed by IBM in Paris and by Guy Paillet, Chairman of Sunnyvale, CA-based Silicon Recognition, Inc.

These chips are known for being thought of as comparable to the neural networks, being marketed for the number of "synapses" and "neurons".

Explanation

A typical program in an assembly language consists of code which operates on data. The code is normally made up of a sequence of commands/instructions, and typically, most of those commands will take arguments.

The OISC (One Instruction Set Computer) concept maintains this construction. However, it only has one sort of instruction/command, which is therefore entirely defined by its arguments. Most OISC commands are moderately, but not excessively, complex and take many arguments. OISCs also commonly use techniques such as self-modifying code and memory-mapping important registers, in order to gain more functionality from their instruction.

A ZISC takes this concept to its extreme. In addition to having only one command, that command takes no arguments. As such, any program necessarily consists of that one command repeated indefinitely; any two programs are thus equivalent, and in fact the program itself is entirely implicit. In order to program in a ZISC, you obviously cannot write the program; instead, you initialize memory.

Pretty much any language which reads commands from memory can be interpreted as a ZISC. This is easiest to see using OISCs as an example.

For example, ByteByteJump, when interpreted as an OISC, has command *b = *a; goto *c;. The ZISC interpretation of the language is more complex, as it has to include the semantics of fetching a memory-mapped instruction from memory: with a 3-word-per-address configuration, its ZISC operation is:


*(ip[3] * 65536 + ip[4] * 256 + ip[5]) = *(ip[0] * 65536 + ip[1] * 256 + ip[2]); ip = ip[7] * 65536 + ip[8] * 256 + ip[9];

Typically, a language that is designed as a ZISC would have a much simpler operation.

Advantages of Zero instruction set computer ZISC

One Instruction Set Computer (OISC) is a common choice for interpreter golf competitions, because only needing to implement one instruction keeps the size of the interpreter low. However, they suffer the overhead of handling the code and data separately (even if they are in the same physical memory array, you nonetheless tend to need separate registers for handling the instruction pointer and for handling any data being manipulated).

A ZISC arrangement simplifies the problem still further as there is no need to keep track of command arguments. (However, it can make programming more complex, as the data itself has to encode rules for operating on that data.)

Usage

Practical uses of ZISC focus on pattern recognition, information retrieval (data mining), security and similar tasks. Can you think what is the advantage of its use?

IBM released the first ZISC35 with 36 neurons in 1993 and the ZISC78 followed in 2000. Manufacturing was discontinued in 2001.

Between 1993 and 2010, DARPA and Intel co-developed the NI1000 around the same time of IBM's patent.

In August 2007, the CM1K (CogniMem 1,024 neurons) was introduced by CogniMem Ltd. CM1K was designed by Anne Menendez and Guy Paillet.

OpenGenus Tech Review Team

OpenGenus Tech Review Team

The official account of OpenGenus's Technical Review Team. This team review all technical articles and incorporates peer feedback. The team consist of experts in the leading domains of Computing.

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