Computer Architecture

Exploring Architecture of CPU

This article delves into the technical aspects of the architecture, including key terminology and diagrams, to help readers develop a thorough understanding of how the core CPU operates.

CPU Core [Concept Explained]

CPU core technology is a fundamental concept in modern computer architecture. At the heart of every central processing unit (CPU) lies a CPU core that executes instructions and performs calculations.

Computer Architecture

Pipelining in CPU [In-depth explanation]

Pipelining is an important concept in CPU optimization and utilization. It is a powerful technique used in modern CPUs to improve their performance and efficiency, but it also requires careful design and management to overcome the challenges and limitations associated with it.

Computer Architecture

Formula for CPU FLOPs (theoretical max)

In this article, we have presented the formula to calculate theoretical max FLOPs for a given CPU system and understand the logic behind it.

Computer Architecture

GCC Compiler Intrinsics

In this article, we will discuss the GNU Compiler Collection (GCC), the fundamentals of intrinsics, some of the ways in which these intrinsics can speed up vector code, and we will also take a look at a list of some of the x86 intrinsics that GCC offers.

Computer Architecture

SIMD & SSE Instruction Set

In this article, we will discuss scalar computing (and some of its drawbacks), the need for vector/parallel computing, the fundamental concepts behind single instruction, multiple data (or SIMD) architecture and SSE.

Operating System

Secure boot

Secure boot is a security standard implemented in the advanced UEFI to prevent malware from attacking the computer during boot up when the computer is most vulnerable.

Computer Architecture

UEFI and Legacy boot

Both UEFI and BIOS are firmware that specify an interface between the computer operating system and the underlying firmware. Legacy boot involves booting the computer using legacy firmware such as BIOS and UEFI boot involves booting a computer using the more advanced UEFI.

Computer Architecture

UEFI (Unified Extensible Firmware Interface)

UEFI(Unified Extensible Firmware Interface) is the interface between the operating system and the low-level initialization firmware. It initializes hardware components and is responsible for executing the OS stored in a boot device.

Computer Architecture

Types of memory devices

In this article, we have covered the different types of memory devices like CD-ROM, SD card and much more.

Computer Architecture

Firmware

In this article we discuss firmware - software that is directly programmed into hardware devices such as routers, cameras, network cards etc.

Computer Architecture

BIOS (Basic Input Output System)

We discuss BIOS - firmware stored in non-volatile memory e.g EPROM, responsible for startup procedures such as POST before passing control to the bootloader which loads the OS.

System Design

Types of Storage Devices

In this article, we will take a look at the various Storage Devices that are used in computing cost, applications and their characteristics.

Computer Architecture

Graphics Processing Unit (GPU) vs Tensor Processing Unit (TPU) vs Field Programmable Gate Arrays (FPGA)

Graphics Processing Unit (GPU), Tensor Processing Unit (TPU) and Field Programmable Gate Array (FPGA) are processors with a specialized purpose and architecture. We have compared these in respect to Memory Subsystem Architecture, Compute Primitive, Performance, Purpose, Usage and Manufacturers.

gpu

Central Processing Unit (CPU) vs Graphics Processing Unit (GPU) vs Tensor Processing Unit (TPU)

Central Processing Unit (CPU), Graphics Processing Unit (GPU) and Tensor Processing Unit (TPU) are processors with a specialized purpose and architecture. We have compared these in respect to Memory Subsystem Architecture, Compute Primitive, Performance, Purpose, Usage and Manufacturers.

instruction set

Explicitly parallel instruction computing (EPIC)

EPIC (Explicitly Parallel Instruction Computing) is a 64-bit microprocessor instruction set which is an improvement to the VLIW (Very Large Instruction Word) architecture. It has been developed by Intel and Hewlett Packard. It uses speculative loading, predication, and explicit parallelism

instruction set

Very long instruction word (VLIW)

Very long instruction word (VLIW) is an instruction set architecture designed to take full advantage of instruction level parallelism in form of pipelining, multiple processors, superscalar implementation and multiple independent operations. It has its advantages and disadvantages and is used widely

instruction set

Minimal Instruction Set Computer (MISC)

Minimal instruction set computer (MISC) is a processor architecture with a very small number of basic operations and corresponding opcodes in its instruction set. MISC has its own advantages and disadvantages. It is commercially used as STEREO and INMOS transputer

instruction set

One Instruction Set Computer (OISC)

One Instruction Set Computer (OISC) is a computer architecture that has only one instruction in its instruction set. It is based on bit manipulating machine, transport triggered architecture and arithmetic based turing complete machines. It has its own advantages and used commercially as high subleq

instruction set

Zero instruction set computer (ZISC)

Zero instruction set computer (ZISC) is a computer architecture based on two fundamental ideas like pattern matching and absence of micro instructions. ZISC has its own advantages and is commercially used by IBM in ZISC35 and by Intel s NI1000. CM1K another ZISC has been developed recently.

instruction set

Examples of Instruction Sets

We have demonstrated examples of instruction set architectures from various categories such as RISC, CISC, MISC, VLIW, EPIC, OISC and ZISC. Examples include ARM, MIPS, OpenRISC, SPARC, x86, z architecture, Intel 8080, Transputer, Transmeta Crusoe, Elbrus 2000, Itanium, Cryptoleq, NI1000 and CM1K.

instruction set

7 Types of Instruction Set

Instruction sets are Reduced Instruction Set Computer (RISC), Complex Instruction Set Computer (CISC), Minimal instruction set computers (MISC), Very long instruction word (VLIW), Explicitly parallel instruction computing (EPIC), One instruction set computer (OISC) and Zero instruction set computer

Computer Architecture

Complex Instruction Set Computer (CISC) architecture explained

CISC Complex Instruction Set Computer architecture focuses on reducing the number of instructions per program It has emphasis on hardware design, has multi clock complex instructions, memory to memory instructions, high cycles per second, small code size and uses transistors for storing instructions

Computer Architecture

Reduced Instruction Set Computer (RISC) architecture explained

RISC (Reduced Instruction Set Computer) architecture focuses on reducing the number of cycles per instruction. It has emphasis on software design, has single clock, reduced instructions only, register to register independent instruction, low cycles per second and large code size. See a RISC example

Machine Learning (ML)

Key ideas that makes Graphics Processing Unit (GPU) work so fast

We have explored the key ideas that are used in Graphics Processing Unit to make it so fast. Ideas include many cores in parallel, pack cores full of ALUs by sharing instruction stream by explicit SIMD vector instruction and avoid latency stalls by interleaving execution of many groups.