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In this article at OpenGenus, we have listed the Number of Clock Cycles in different Assembly Instructions like LEA, XCHG and others.
Table of contents:
- Table: Number of Clock Cycles in Assembly Instructions
Table: Number of Clock Cycles in Assembly Instructions
Following table lists the Number of Clock Cycles in different Assembly Instructions:
| Operation | Clock Cyles |
|---|---|
| MOV | 0.25 to 1 |
| XCHG | 1 |
| ADD | 1 |
| ADC | 1 to 2 |
| SUB | 1 to 2 |
| SBB | 1 to 2 |
| CMP | 1 to 2 |
| AND | 1 to 2 |
| OR | 1 to 2 |
| XOR | 1 to 2 |
| INC | 1 to 2 |
| DEC | 1 to 2 |
| NOT | 1 |
| NEG | 1 |
| SHL | 1 to 2 |
| SHR | 1 to 2 |
| LEA | 1 |
| ROL | 1 |
| ROR | 1 |
| PUSH | 1 to 2 |
| POP | 1 to 2 |
| CALL | 4 to 7 |
| RET | 4 to 7 |
| JMP | 3 to 6 |
| LOOP | 2 to 3 |
| OUT | 10 |
| MUL | 3 to 19 |
| IMUL | 4 to 23 |
| FPU | 12 to 80 |
| CALL | 5 to 22 |
| RET | 5 to 18 |
| INT | 25 to 120 |
| DIV (8 bit) | 24 to 44 |
| DIV (64 bits) | 156 |
| IDIV | 55 TO 70 |
DIV instruction has the maximum number of clock cycles across all assembly instructions. For 64 bit data, DIV can involve upto 150 clock cycles.
With this article at OpenGenus, you must have the complete idea of number of clock cycles involved in different assembly instructions.
