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Very long instruction word (VLIW)

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Very long instruction word (VLIW) is an instruction set architecture designed to take full advantage of instruction level parallelism (ILP) for improved performance. Central processing units (CPU, processor) allow programs to specify instructions to execute in sequence only whereas a VLIW processor allows programs to explicitly specify instructions to execute in parallel. This design is intended to allow higher performance without the complexity inherent in some other designs.

Why to use VLIW?

The key to higher performance in microprocessors for a broad range of applications is the ability to exploit fine-grain, instruction-level parallelism. Some methods for exploiting fine-grain parallelism include:

  • pipelining
  • multiple processors
  • superscalar implementation
  • specifying multiple independent operations per instruction

Pipelining is now universally implemented in high-performance processors. Little more can be gained by improving the implementation of a single pipeline. Using multiple processors improves performance for only a restricted set of applications. Superscalar implementations can improve performance for all types of applications. Superscalar (super: beyond; scalar: one dimensional) means the ability to fetch, issue to execution units, and complete more than one instruction at a time.

Superscalar implementations are required when architectural compatibility must be preserved, and they will be used for entrenched architectures with legacy software, such as the x86 architecture that dominates the desktop computer market. Specifying multiple operations per instruction creates a very-long instruction word architecture or VLIW.

A VLIW implementation has capabilities very similar to those of a superscalar processor—issuing and completing more than one operation at a time—with one important exception: the VLIW hardware is not responsible for discovering opportunities to execute multiple operations concurrently. For the VLIW implementation, the long instruction word already encodes the concurrent operations. This explicit encoding leads to dramatically reduced hardware complexity compared to a high-degree superscalar implementation of a RISC or CISC. The big advantage of VLIW, then, is that a highly concurrent (parallel) implementation is much simpler and cheaper to build than equivalently concurrent RISC or CISC chips. VLIW is a simpler way to build a superscalar microprocessor.


Advantages of VLIW are:

  • Performance similar to CISC and RISC
  • Reduced hardware complexity over a superscalar implementation
  • Uses instruction level parallelism to the fullest
  • VLIW is a simpler way to build a superscalar microprocessor

Commercial Use

VLIW has found commercial use as follows:

  • VLIW is used extensively in the embedded chip market
  • Intel implemented VLIW in the Intel i860, their first 64-bit microprocessor
  • Commercial VLIW CPUs include:
    • TriMedia media processors by NXP (formerly Philips Semiconductors)
    • Super Harvard Architecture Single-Chip Computer (SHARC) DSP by Analog Devices
    • C6000 digital signal processor (DSP) family by Texas Instruments
  • Intel's Itanium IA-64 explicitly parallel instruction computing (EPIC) and Elbrus 2000 aare widely used VLIW CPU architectures
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OpenGenus Tech Review Team

The official account of OpenGenus's Technical Review Team. This team review all technical articles and incorporates peer feedback. The team consist of experts in the leading domains of Computing.

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